March 2007:
Triakis Completes STEREO VSIL Evaluation Effort with JHU Applied Physics Laboratory
Triakis recently completed its role in an evaluation of the STEREO spacecraft VSIL developed with funding from the NASA IV&V Facility. This effort was conceived and conducted by the Johns Hopkins University Applied Physics Laboratory, to assess the technical merits of using a VSIL in the development and verification of flight software on future spacecraft programs.
While the funding provided did not allow full development of the STEREO VSIL, Triakis was able to develop the VSIL sufficiently to run the flight software object code in both the virtual C&DH and GNC RAD6000 processor boards. This included the creation of a high-fidelity implementation of the spacecraft's 1553 communication backbone with the Star Tracker, the Inertial Measurement Units, the Power Distribution Unit, the Transponder, and scientific instruments connected and responding to commands. The VSIL also incorporates the spacecraft inertial model, the thrusters, reaction wheels, and a virtual ground station through which commands may be up-linked to the spacecraft in the standard format.
For this evaluation effort, APL's STEREO Software Project Manager identified a collection of tests to elicit known software faults discovered late in the development process, in the STEREO VSIL. The tests selected ranged from the lowest level of software interaction with the RAD6000 board hardware, to high-level software response to environmental events. APL concluded that the STEREO flight software tests conducted in the VSIL achieved all but one of the established test objectives. An assessment of the unrealized objective determined it likely to be the result of not having the CPU cache modeled in the VSIL, and the decision was made to not add that fidelity for the purposes of this evaluation.
In its evaluation report, APL concluded that a VSIL is technically & programmatically feasible to implement for the next spacecraft development effort and that it would provide the following benefits:
- reduction of load on hardware test-beds
- capability to support anomaly resolution
- potential for some software cost reduction due to early detection of faults
- potential for some increase in software quality